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Now showing items 211-219 of 219
A Graph-Theoretic Approach to Default Logic
(1994)
A network representation of propositional seminormal disjunction-free default theories is presented, leading to a graph-theoretic approach to their analysis. The problem of finding an extension is proved to be equivalent ...
Block Scheduling of Iterative Algorithms and Graph-Level Priority Scheduling in a Simulated Data-Flow Multiprocessor
(1993)
While data-flow principles permit the utilization of large-scale multiprocessor systems with high programmability and good efficiency, they also introduce much overhead at runtime. In this paper, we have studied an important ...
Thread synchronization unit (TSU): A building block for high performance computers
(1997)
The Thread Synchronization Unit (TSU) is a hardware mechanism that provides data-driven thread synchronization and data consistency for multi-threaded architectures built with control-flow (i.e. commodity) microprocessors. ...
Mapping fortran programs to single assignment semantics for efficient parallelization
(1998)
This paper presents Mustang, a system that automatically parallellizes Fortran programs by mapping them to single assignment semantics. Specifically, sequential Fortran source programs are translated into IF1, a ...
Incorporating input/output operations into dynamic data-flow graphs
(1995)
Driven by the 'side-effect' environment of sequential von Neumann computing, Input/Output operations have evolved as state operations on shared files. In parallel programs, if multiple instances of an I/O-performing process ...
Fault detection and recovery in a data-driven real-time multiprocessor
(Publ by IEEE, 1994)
This paper introduces the mechanisms required to perform fault detection and recovery in the DART multiprocessor architecture. The DART multiprocessors uses prioritized data-driven scheduling to ensure that multiple hard ...
Efficiency of oblivious versus non-oblivious schedulers for optimistic, rate-based flow control
(ACM, 1997)
Lower and upper bounds on convergence complexity, under varying degrees of locality, for optimistic, rate-based flow control algorithms are established. It is shown that randomness can be exploited to yield an even simpler ...
DART: a data-driven processor architecture for real-time computing
(Publ by Elsevier Science Publishers B.V., 1993)
This paper presents the design of DART, a Data-driven processor Architecture for Real-Time computing. The DART processor is designed to be the key building block in real-time multiprocessor systems that can handle multiple ...
Results of parallel implementations of the selection problem using sisal
(Publ by Elsevier Science Publishers B.V., 1993)
This paper presents an in depth analysis on the parallel implementation of four of the standard selection algorithms using a functional language on a number of multiprocessor and supercomputers. Three of the algorithms: ...