Browsing by Author "Nikolaou, Panagiota"
Now showing items 1-11 of 11
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Conference Object
An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits
Karakonstantis, Georgios; Tovletoglou, Konstantinos; Mukhanov, Lev; Vandierendonck, Hans; Nikolopoulos, Dimitrios S.; Lawthers, Peter; Koutsovasilis, Panos; Maroudas, Manolis; Antonopoulos, Christos D.; Kalogirou, Christos; Bellas, Nikos; Lalis, Spyros; Venugopal, Srikumar; Prat-Pérez, Arnau; Lampropulos, Alejandro; Kleanthous, Marios; Diavastos, Andreas; Hadjilambrou, Zacharias; Nikolaou, Panagiota; Sazeides, Yiannakis; Trancoso, Pedro; Papadimitriou, George; Kaliorakis, Manolis; Chatzidimitriou, Athanasios; Gizopoulos, Dimitris; Das, Shidhartha (2018)The explosive growth of Internet-connected devices will soon result in a flood of generated data, which will increase the demand for network bandwidth as well as compute power to process the generated data. Consequently, ...
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Book Chapter
Evaluating System-Level Monitors and Knobs on Real Hardware
Nikolaou, Panagiota; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Ndreu, Lorena; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Portero, Antoni; Vavrik, Radim; Vondrak, Vit (Springer International Publishing, 2019)This chapter evaluates and defines a methodology for the oracle selection of the monitors and knobs to use to configure an HPC system running a scientific application while satisfying the application’s requirements and not ...
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Book Chapter
Evaluating System-Level Monitors and Knobs on Real Hardware
Nikolaou, Panagiota; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Ndreu, Lorena; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Portero, Antoni; Vavrik, Radim; Vondrak, Vit (Springer International Publishing, 2019)This chapter evaluates and defines a methodology for the oracle selection of the monitors and knobs to use to configure an HPC system running a scientific application while satisfying the application’s requirements and not ...
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Book Chapter
The HARPA Approach to Ensure Dependable Performance
Zompakis, Nikolaos; Noltsis, Michail; Nikolaou, Panagiota; Englezakis, Panayiotis; Hadjilambrou, Zacharias; Ndreu, Lorena; Massari, Giuseppe; Libutti, Simone; Portero, Antoni; Sassi, Federico; Bacchini, Alessandro; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Vavrik, Radim; Golasowski, Martin; Sevcik, Jiri; Kuchar, Stepan; Vondrak, Vit; Agnes, Fritsch; Cappelle, Hans; Catthoor, Francky; Fornaciari, William; Soudris, Dimitrios (Springer International Publishing, 2019)The goal of the HARPA solution is to overcome the performance variability (PV) by enabling next-generation embedded and high-performance platforms using heterogeneous many-core processors to provide cost-effectively ...
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Book Chapter
The HARPA Approach to Ensure Dependable Performance
Zompakis, Nikolaos; Noltsis, Michail; Nikolaou, Panagiota; Englezakis, Panayiotis; Hadjilambrou, Zacharias; Ndreu, Lorena; Massari, Giuseppe; Libutti, Simone; Portero, Antoni; Sassi, Federico; Bacchini, Alessandro; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Vavrik, Radim; Golasowski, Martin; Sevcik, Jiri; Kuchar, Stepan; Vondrak, Vit; Agnes, Fritsch; Cappelle, Hans; Catthoor, Francky; Fornaciari, William; Soudris, Dimitrios (Springer International Publishing, 2019)The goal of the HARPA solution is to overcome the performance variability (PV) by enabling next-generation embedded and high-performance platforms using heterogeneous many-core processors to provide cost-effectively ...
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Conference Object
HARPA: Tackling physically induced performance variability
Zompakis, Nikolaos; Noltsis, Michail; Ndreu, L.; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Nikolaou, Panagiota; Portero, Antoni; Libutti, S.; Massari, Giuseppe; Sassi, F.; Bacchini, A.; Nicopoulos, Chrysostomos A.; Sazeides, Yiannakis; Vavrik, R.; Golasowski, M.; Sevcik, J.; Vondrak, V.; Catthoor, F.; Fornaciari, W.; Soudris, Dimitrios J. (Institute of Electrical and Electronics Engineers Inc., 2017)Continuously increasing application demands on both High Performance Computing (HPC) and Embedded Systems (ES) are driving the IC manufacturing industry on an everlasting scaling of devices in silicon. Nevertheless, ...
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Conference Object
Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes
Sazeides, Yiannakis; Özer, E.; Kershaw, D.; Nikolaou, Panagiota; Kleanthous, Marios M.; Abella, J. (2013)This paper proposes implicit-storing to extend the logical capacity of a memory array without increasing its physical capacity by leveraging the array's error-correction-codes to infer the implicitly stored bits. ...
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Conference Object
Memory array protection: Check on read or check on write?
Nikolaou, Panagiota; Sazeides, Yiannakis; Ndreu, L.; Özer, E.; Idgunji, S. (2013)This work introduces Check-on-Write: a memory array error protection approach that enables a trade-off between a memory array's fault-coverage and energy. The presented approach checks for error in a value stored in an ...
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Conference Object
Modeling the implications of DRAM failures and protection techniques on datacenter TCO
Nikolaou, Panagiota; Sazeides, Yiannakis; Ndreu, L.; Kleanthous, Marios M. (IEEE Computer Society, 2015)Total Cost of Ownership (TCO) is a key optimization metric for the design of a datacenter. This paper proposes, for the first time, a framework for modeling the implications of DRAM failures and DRAM error protection ...
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Master Thesis
Power-aware Error Detection Schemes for Memory Arrays
Nikolaou, Panagiota (Πανεπιστήμιο Κύπρου, Σχολή Θετικών και Εφαρμοσμένων Επιστημών / University of Cyprus, Faculty of Pure and Applied Sciences, 2011-12)Achieving fault tolerance is an inevitable problem in architectural arrays such as caches, which it becoming more challenging with the power constrains. This work propose to reduce energy by avoiding access to columns of ...
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Article
Toward multi-layer holistic evaluation of system designs
Kleanthous, Marios M.; Sazeides, Yiannakis; Ozer, E.; Nicopoulos, Chrysostomos A.; Nikolaou, Panagiota; Hadjilambrou, Zacharias (2016)The common practice for quantifying the benefit(s) of design-time architectural choices of server processors is often limited to the chip- or server-level. This quantification process invariably entails the use of salient ...