Browsing by Subject "On chips"
Now showing items 1-4 of 4
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Conference Object
Eliminating energy of same-content-cell-columns of on-chip SRAM arrays
(2011)This work proposes to reduce energy by avoiding access to columns of on-chip SRAM arrays whose cell contents are all 1s or all 0s. We refer to this dynamic phenomenon as the Same-Cell-Content-Column (SCC-column). Analysis ...
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Conference Object
Exploring database workloads on future clustered many-core architectures
(2011)Decision Support System (DSS) workloads are known to be one of the most time-consuming database workloads that process large data sets. Traditionally, DSS queries have been accelerated using large-scale multiprocessor. In ...
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Article
Optimizing data-center tco with scale-out processors
(2012)Performance and total cost of ownership (TCO) are key optimization metrics in large-scale data centers. According to these metrics, data centers designed with conventional server processors are inefficient. Recently ...
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Conference Object
Proposition for a sequential accelerator in future general-purpose manycore processors and the problem of migration-induced cache misses
(2010)As the number of transistors on a chip doubles with every technology generation, the number of on-chip cores also increases rapidly, making possible in a foreseeable future to design processors featuring hundreds of ...