An energy- and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems
Date
2011Author
Lee, H. G.Baek, S.
Nicopoulos, Chrysostomos A.
Kim, J.
Source
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and ProcessorsProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Pages
381-387Google Scholar check