| dc.contributor.author | Maniatakos, M. | en |
| dc.contributor.author | Michael, Maria K. | en |
| dc.contributor.author | Makris, Y. | en |
| dc.creator | Maniatakos, M. | en |
| dc.creator | Michael, Maria K. | en |
| dc.creator | Makris, Y. | en |
| dc.date.accessioned | 2019-04-08T07:47:06Z | |
| dc.date.available | 2019-04-08T07:47:06Z | |
| dc.date.issued | 2015 | |
| dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/44160 | |
| dc.source | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | en |
| dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84909979311&doi=10.1109%2fTVLSI.2014.2365032&partnerID=40&md5=d83ec9ae7114f3b36f31c1d068c3b7ed | |
| dc.title | Multiple-Bit Upset Protection in Microprocessor Memory Arrays Using Vulnerability-Based Parity Optimization and Interleaving | en |
| dc.type | info:eu-repo/semantics/article | |
| dc.identifier.doi | 10.1109/TVLSI.2014.2365032 | |
| dc.description.volume | 23 | |
| dc.description.issue | 11 | |
| dc.description.startingpage | 2447 | |
| dc.description.endingpage | 2460 | |
| dc.author.faculty | Πολυτεχνική Σχολή / Faculty of Engineering | |
| dc.author.department | Τμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering | |
| dc.type.uhtype | Article | en |
| dc.source.abbreviation | IEEE Trans Very Large Scale Integr VLSI Syst | en |
| dc.contributor.orcid | Michael, Maria K. [0000-0002-1943-6547] | |
| dc.gnosis.orcid | 0000-0002-1943-6547 | |
