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dc.contributor.authorNeophytou, S. N.en
dc.contributor.authorMichael, Maria K.en
dc.creatorNeophytou, S. N.en
dc.creatorMichael, Maria K.en
dc.date.accessioned2019-04-08T07:47:23Z
dc.date.available2019-04-08T07:47:23Z
dc.date.issued2012
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/44336
dc.sourceIEEE Transactions on Very Large Scale Integration (VLSI) Systemsen
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-84857452340&doi=10.1109%2fTVLSI.2010.2102056&partnerID=40&md5=b02410d58bba0662ee1246ad814b0d74
dc.titleTest pattern generation of relaxed n-detect test setsen
dc.typeinfo:eu-repo/semantics/article
dc.identifier.doi10.1109/TVLSI.2010.2102056
dc.description.volume20
dc.description.issue3
dc.description.startingpage410
dc.description.endingpage423
dc.author.facultyΠολυτεχνική Σχολή / Faculty of Engineering
dc.author.departmentΤμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtypeArticleen
dc.source.abbreviationIEEE Trans Very Large Scale Integr VLSI Systen
dc.contributor.orcidMichael, Maria K. [0000-0002-1943-6547]
dc.gnosis.orcid0000-0002-1943-6547


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