Browsing by Author "Psarras, Anastasios"

Now showing items 1-4 of 4

    • Article  

      A Dual-Clock Multiple-Queue Shared Buffer 

      Psarras, Anastasios; Paschou, Michalis; Nicopoulos, Chrysostomos A.; Dimitrakopoulos, G. (2017)
    • Conference Object  

      Low-power dual-edge-triggered synchronous latency-insensitive systems 

      Konstantinou, Dimitris; Psarras, Anastasios; Dimitrakopoulos, Giorgos; Nicopoulos, Chrysostomos (2018)
      Latency-insensitive data flow is a design paradigm that tolerates the latency variability of computations and communications and allows for correct-by-construction module integration. In this paper, we aim to reduce the ...
    • Article  

      The Mesochronous Dual-Clock FIFO Buffer 

      Konstantinou, Dimitrios; Psarras, Anastasios; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2020)
      To increase system composability and facilitate timing closure, fully synchronous clocking is replaced by more relaxed clocking schemes, such as mesochronous clocking. Under this regime, the modules at the two ends of a ...
    • Article  

      ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing 

      Psarras, Anastasios; Seitanidis, Ioannis; Nicopoulos, Chrysostomos A.; Dimitrakopoulos, G. (2016)