Browsing by Subject "Buffer storage"

Now showing items 1-15 of 15

    • Conference Object  

      An analytical model for the calculation of the Expected Miss Ratio in faulty caches 

      Sánchez, D.; Sazeides, Yiannakis; Aragón, J. L.; García, J. M. (2011)
      Technology scaling improvement is affecting the reliability of ICs due to increases in static and dynamic variations as well as wear-out failures. This is particularly true for caches that dominate the area of modern ...
    • Article  

      Cache optimization for memory-resident decision support commercial workloads 

      Trancoso, Pedro; Torrellas, Josep (1999)
      Dramatic increases in the main-memory size of computers is allowing some applications to shift their main data storage area from disk to main memory and, as a result, increase their performance. This trend is at work in ...
    • Article  

      Content-selection strategies for the periodic prefetching of WWW resources via satellite 

      Dikaiakos, Marios D.; Stassopoulou, Athena (2001)
      In this paper we study satellite-caching, that is, the employment of satellite multicasting for the dissemination of prefetched content to WWW caches. This approach is currently being deployed by major satellite operators ...
    • Article  

      Detailed characterization of a Quad Pentium Pro server running TPC-D 

      Cao, Q.; Trancoso, Pedro; Larriba-Pey, J. -L; Torrellas, J.; Knighten, R.; Won, Y. (1999)
      While database workloads consume a major fraction of the cycles in today's machines, there are only a few public-domain performance studies that characterize in detail how these workloads exercise the machines. This fact ...
    • Conference Object  

      Dynamic split: Flexible border between instruction and data cache 

      Trancoso, Pedro (2005)
      Current microprocessors are optimized for the average use. Nevertheless, it is known that different applications impose different demands on the system. This work focuses on the reconfiguration of the first-level caches. ...
    • Article  

      Efficient bufferless packet switching on trees and leveled networks 

      Busch, Costas; Magdon-Ismail, M.; Mavronicolas, Marios (2007)
      In bufferless networks the packets cannot be buffered while they are in transit
    • Conference Object  

      Fast backward predictive congestion notification for ATM networks with significant propagation delays 

      Hu, Xiying; Lambert, James F.; Pitsillides, Andreas (1995)
      A fast Backward Predictive Congestion Notification (BPCN) scheme for ATM networks is proposed, whose objective is to avoid cell loss and achieve high resource utilisation during high traffic demand. A dynamic adaptive model ...
    • Conference Object  

      FRES-CAR: An adaptive cache replacement policy 

      Pallis, George C.; Vakali, Athena I.; Sidiropoulos, E. (2005)
      Caching Web objects has become a common practice towards improving content delivery and users' servicing. A Web caching framework is characterized by its cache replacement policy, which identifies the objects (i.e. the ...
    • Conference Object  

      Integrated control of connection admission, flow rate, and bandwidth for ATM based networks 

      Pitsillides, Andreas; Ioannou, Petros A.; Tipper, David (1996)
      We consider the combined control problem of connection admission, flow rate, and bandwidth allocation (capacity, service-rate) under nonstationary conditions. A fluid flow model in state variable form describes the time ...
    • Conference Object  

      Integrated control of connection admission, flow rate, and bandwidth for ATM based networksAAA 

      Pitsillides, Andreas; Ioannou, Petros A.; Tipper, David (1996)
      We consider the combined control problem of connection admission, flow rate, and bandwidth allocation (capacity, service-rate) under nonstationary conditions. A fluid flow model in state variable form describes the time ...
    • Article  

      Memory assignment for multiprocessor caches through grey coloring 

      Agarwal, A.; Guttag, J. V.; Hadjicostis, Christoforos N.; Papaefthymiou, M. C. (1994)
      The achieved performance of multiprocessors is heavily dependent on the performance of their caches. Cache performance is severely degraded when data tiles used by a program conflict in the caches. This paper explores ...
    • Conference Object  

      Memory performance of DSS commercial workloads in shared-memory multiprocessors 

      Trancoso, Pedro; Larriba-Pey, Josep-L; Zhang, Zheng; Torrellas, Josep (IEEE, 1997)
      Although cache-coherent shared-memory multiprocessors are often used to run commercial workloads, little work has been done to characterize how well these machines support such workloads. In particular, we do not have much ...
    • Conference Object  

      Performance study of cosmological simulations on message-passing and shared-memory multiprocessors 

      Dikaiakos, Marios D.; Stadel, Joachim (ACM, 1996)
      In this paper we describe PKDGRAV, a parallel hierarchical tree-structured code used to conduct cosmological simulations on shared-memory and message-passing multiprocessors. We explore performance traits of cosmological ...
    • Conference Object  

      RC-BB switch a high performance switching network for B-ISDN 

      Chen, Hongxu; Lambert, Jim; Pitsillides, Andreas (1995)
      Multistage networks are strong candidates for implementation of ATM switching fabrics in B-ISDN networks. Among a number of proposed multistage networks, the Banyan network with its self-routing property, modular structure ...
    • Conference Object  

      Trace processors 

      Rotenberg, Eric; Jacobson, Quinn; Sazeides, Yiannakis; Smith, Jim (IEEE Comp Soc, 1997)
      Traces are dynamic instruction sequences constructed and cached by hardware. A microarchitecture organized around traces is presented as a means for efficiently executing many instructions per cycle. Trace processors exploit ...