Browsing 002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences by Subject "Cache configurations"

Now showing items 1-3 of 3

    • Conference Object  

      An analytical model for the calculation of the Expected Miss Ratio in faulty caches 

      Sánchez, D.; Sazeides, Yiannakis; Aragón, J. L.; García, J. M. (2011)
      Technology scaling improvement is affecting the reliability of ICs due to increases in static and dynamic variations as well as wear-out failures. This is particularly true for caches that dominate the area of modern ...
    • Article  

      Memory-, bandwidth-, and power-aware multi-core for a graph database workload 

      Trancoso, Pedro; Martinez, N.; Larriba-Pey, J. -L (2011)
      Processors have evolved to the now de-facto standard multi-core architecture. The continuous advances in technology allow for increased component density, thus resulting in a larger number of cores on the chip. This, in ...
    • Article  

      Modeling the impact of permanent faults in caches 

      Sánchez, D.; Sazeides, Yiannakis; Cebrián, J. M.; Garćia, J. M.; Aragón, J. L. (2013)
      The traditional performance cost benefits we have enjoyed for decades from technology scaling are challenged by several critical constraints including reliability. Increases in static and dynamic variations are leading to ...