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A novel SBST generation technique for path-delay faults in microprocessors based on BDD analysis and evolutionary algorithm

dc.contributor.authorChristou, K.en
dc.contributor.authorMichael, Maria K.en
dc.contributor.authorBernardi, P.en
dc.contributor.authorGrosso, M.en
dc.contributor.authorSanchez, E.en
dc.contributor.authorSonza Reorda, M.en
dc.creatorChristou, K.en
dc.creatorMichael, Maria K.en
dc.creatorBernardi, P.en
dc.creatorGrosso, M.en
dc.creatorSanchez, E.en
dc.creatorSonza Reorda, M.en
dc.date.accessioned2019-04-08T07:45:26Z
dc.date.available2019-04-08T07:45:26Z
dc.date.issued2008
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/43187
dc.sourceProc. of 26th IEE VLSI Test Symposium (VTS)en
dc.titleA novel SBST generation technique for path-delay faults in microprocessors based on BDD analysis and evolutionary algorithmen
dc.typeinfo:eu-repo/semantics/conferenceObject
dc.description.startingpage389
dc.description.endingpage394
dc.author.facultyΠολυτεχνική Σχολή / Faculty of Engineering
dc.author.departmentΤμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtypeConference Objecten
dc.contributor.orcidMichael, Maria K. [0000-0002-1943-6547]
dc.gnosis.orcid0000-0002-1943-6547


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