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Address-data event representation for communication in multichip neuromorphic system architectures

dc.contributor.authorGeorgiou, J.en
dc.contributor.authorAndreou, A. G.en
dc.creatorGeorgiou, J.en
dc.creatorAndreou, A. G.en
dc.date.accessioned2019-04-08T07:45:57Z
dc.date.available2019-04-08T07:45:57Z
dc.date.issued2007
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/43487
dc.sourceElectronics Lettersen
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-34547616640&doi=10.1049%2fel%3a20070897&partnerID=40&md5=7963e31728a1ba72c4aed147df5f1535
dc.titleAddress-data event representation for communication in multichip neuromorphic system architecturesen
dc.typeinfo:eu-repo/semantics/article
dc.identifier.doi10.1049/el:20070897
dc.description.volume43
dc.description.issue14
dc.description.startingpage767
dc.description.endingpage769
dc.author.facultyΠολυτεχνική Σχολή / Faculty of Engineering
dc.author.departmentΤμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtypeArticleen
dc.source.abbreviationElectron.Lett.en
dc.contributor.orcidGeorgiou, J. [0000-0002-7474-5449]
dc.gnosis.orcid0000-0002-7474-5449


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