Finite-State Machine Embeddings for Non-Concurrent Error Detection and Identification

Abstract

In digital sequential systems that operate over several time steps, a state-transition fault at any time step during the operation of the system corrupts its state in a way that can render its future functionality useless. In this paper, we develop a methodology for systematically constructing redundant finitestate machines so that an external checker can capture transient state-transition faults via checks that are performed in a non-concurrent manner (e.g., periodically). More specifically, the proposed approach allows the checker to detect and identify errors due to past state-transition faults based on an analysis of the current, possibly corrupted FSM state. As a result, the checker in such designs can operate at a slower speed than the rest of the system which relaxes the stringent requirements on its reliability.