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dc.contributor.authorHadjicostis, Christoforos N.en
dc.creatorHadjicostis, Christoforos N.en
dc.date.accessioned2019-04-08T07:46:03Z
dc.date.available2019-04-08T07:46:03Z
dc.date.issued2001
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/43549
dc.description.abstractThe parallel-prefix method uses a tree of identical processing nodes to calculate in parallel, the state and output response of a finite-state machine (FSM) to a finite-length input sequence. Traditionally, each computing node in the tree has been required to perform multiplication of binary matrices. In this paper, we show that under appropriate modifications of the input-output mappings at the leaf nodes of the tree, the operation of each node can be reduced to the operation of the unique finite semigroup that is associated with the given FSM. In terms of this view, previous parallel-prefix approaches for sequential circuits have treated the worst case scenario, in which the order of the associated semigroup is exponential in the number of states of the given FSM.en
dc.sourceIEEE Transactions on Circuits and Systems I: Fundamental Theory and Applicationsen
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-0035481885&doi=10.1109%2f81.956018&partnerID=40&md5=36255a33b1cf23ddd3b9e9a93b24015f
dc.subjectMatrix algebraen
dc.subjectFinite automataen
dc.subjectFinite-state machinesen
dc.subjectParallel processing systemsen
dc.subjectFinite-state machines (fsm)en
dc.subjectDiscrete-time iteration bounden
dc.subjectParallel processingen
dc.subjectPrefix problemen
dc.subjectSequential circuitsen
dc.subjectTrees (mathematics)en
dc.titleOn the complexity of parallelizing sequential circuits using the parallel-prefix methoden
dc.typeinfo:eu-repo/semantics/article
dc.identifier.doi10.1109/81.956018
dc.description.volume48
dc.description.issue10
dc.description.startingpage1228
dc.description.endingpage1233
dc.author.facultyΠολυτεχνική Σχολή / Faculty of Engineering
dc.author.departmentΤμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtypeArticleen
dc.source.abbreviationIEEE Trans.Circuits Syst.I Fundam.Theor.Appl.en
dc.contributor.orcidHadjicostis, Christoforos N. [0000-0002-1706-708X]
dc.gnosis.orcid0000-0002-1706-708X


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