dc.contributor.author | Hadjicostis, Christoforos N. | en |
dc.contributor.author | Verghese, G. C. | en |
dc.creator | Hadjicostis, Christoforos N. | en |
dc.creator | Verghese, G. C. | en |
dc.date.accessioned | 2019-04-08T07:46:06Z | |
dc.date.available | 2019-04-08T07:46:06Z | |
dc.date.issued | 1999 | |
dc.identifier.isbn | 0-7803-5682-9 | |
dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/43576 | |
dc.description.abstract | In this paper we develop a framework for constructing fault-tolerant dynamic systems, focusing primarily on linear finite state machines (LFSMs). Modular redundancy, the traditional approach to fault tolerance, is expensive because of the overhead in replicating the hardware and its reliance on the assumption that the error-correcting (voting) mechanism is fault-free. Our approach is more general, makes efficient use of redundancy, and relaxes the strict requirements regarding the reliability of the error corrector. By combining linear coding techniques and dynamic system theory, we characterize the class of all appropriate redundant implementations. Furthermore, we construct reliable LFSM's assembled exclusively from unreliable components, including unreliable voters and parity checkers in the error correcting mechanism. Using constant redundancy per system, we obtain implementations of identical LFSM's that operate in parallel on distinct input sequences and achieve arbitrarily low probability of failure during any specified finite time interval. © 1999 IEEE. | en |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en |
dc.source | Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems | en |
dc.source | Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-0010354805&doi=10.1109%2fICECS.1999.813422&partnerID=40&md5=2178f3bb0e8473f8b14f0dbc32882237 | |
dc.subject | Errors | en |
dc.subject | Fault tolerant computer systems | en |
dc.subject | Logic circuits | en |
dc.subject | Dynamical systems | en |
dc.subject | Dynamics | en |
dc.subject | Fault tolerance | en |
dc.subject | Redundancy | en |
dc.subject | Modular redundancy | en |
dc.subject | Traditional approaches | en |
dc.subject | Linear finite state machines | en |
dc.subject | Error-correcting | en |
dc.subject | Finite time intervals | en |
dc.subject | Input sequence | en |
dc.subject | Low probability | en |
dc.subject | Parity checker | en |
dc.title | Fault-tolerant linear finite state machines | en |
dc.type | info:eu-repo/semantics/conferenceObject | |
dc.identifier.doi | 10.1109/ICECS.1999.813422 | |
dc.description.volume | 2 | |
dc.description.startingpage | 1085 | |
dc.description.endingpage | 1088 | |
dc.author.faculty | Πολυτεχνική Σχολή / Faculty of Engineering | |
dc.author.department | Τμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering | |
dc.type.uhtype | Conference Object | en |
dc.contributor.orcid | Hadjicostis, Christoforos N. [0000-0002-1706-708X] | |
dc.gnosis.orcid | 0000-0002-1706-708X | |