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A unified framework for generating all propagation functions for logic errors and events

dc.contributor.authorMichael, Maria K.en
dc.contributor.authorHaniotakis, T.en
dc.contributor.authorTragoudas, S.en
dc.creatorMichael, Maria K.en
dc.creatorHaniotakis, T.en
dc.creatorTragoudas, S.en
dc.date.accessioned2019-04-08T07:47:11Z
dc.date.available2019-04-08T07:47:11Z
dc.date.issued2004
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/44217
dc.sourceIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsen
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-2942541392&doi=10.1109%2fTCAD.2004.828112&partnerID=40&md5=fa7936b465a3499f70fb5d802e322720
dc.titleA unified framework for generating all propagation functions for logic errors and eventsen
dc.typeinfo:eu-repo/semantics/article
dc.identifier.doi10.1109/TCAD.2004.828112
dc.description.volume23
dc.description.issue6
dc.description.startingpage980
dc.description.endingpage986
dc.author.facultyΠολυτεχνική Σχολή / Faculty of Engineering
dc.author.departmentΤμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtypeArticleen
dc.source.abbreviationIEEE Trans Comput Aided Des Integr Circuits Systen
dc.contributor.orcidMichael, Maria K. [0000-0002-1943-6547]
dc.gnosis.orcid0000-0002-1943-6547


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