| dc.contributor.author | Touri, R. | en |
| dc.contributor.author | Voulgaris, P. G. | en |
| dc.contributor.author | Hadjicostis, Christoforos N. | en |
| dc.creator | Touri, R. | en |
| dc.creator | Voulgaris, P. G. | en |
| dc.creator | Hadjicostis, Christoforos N. | en |
| dc.date.accessioned | 2019-04-08T07:48:31Z | |
| dc.date.available | 2019-04-08T07:48:31Z | |
| dc.date.issued | 2010 | |
| dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/44987 | |
| dc.description.abstract | We consider the transmission of a discrete data sequence via a communication channel that is subject to (additive) noise with a known upper bound on its magnitude but otherwise completely unrestricted behaviour. We provide a general recursive algorithm that can be used at the receiving end to perfectly reconstruct the transmitted sequence (possibly with some delay) when the existing necessary and sufficient conditions for perfect reconstruction hold, or to obtain all valid sequences that are consistent with the received sequence when the perfect reconstruction condition is violated. We also discuss the memory and computational requirements for the proposed algorithm. © 2010 Inderscience Enterprises Ltd. | en |
| dc.source | International Journal of Systems, Control and Communications | en |
| dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84952958429&doi=10.1504%2fIJSCC.2010.031165&partnerID=40&md5=ede5eb5269dd765799b6c7aae9ef7caa | |
| dc.subject | Discrete data reconstruction | en |
| dc.subject | Equalisation | en |
| dc.subject | L1 optimality | en |
| dc.subject | Perfect reconstructability margin | en |
| dc.subject | Worst case | en |
| dc.title | Algorithmic design of perfectly reconstructing equalisers | en |
| dc.type | info:eu-repo/semantics/article | |
| dc.identifier.doi | 10.1504/IJSCC.2010.031165 | |
| dc.description.volume | 2 | |
| dc.description.issue | 1-3 | |
| dc.description.startingpage | 238 | |
| dc.description.endingpage | 255 | |
| dc.author.faculty | Πολυτεχνική Σχολή / Faculty of Engineering | |
| dc.author.department | Τμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering | |
| dc.type.uhtype | Article | en |
| dc.source.abbreviation | Intern.J.Syst.Control Comm. | en |
| dc.contributor.orcid | Hadjicostis, Christoforos N. [0000-0002-1706-708X] | |
| dc.gnosis.orcid | 0000-0002-1706-708X | |
