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dc.contributor.authorKleanthous, Marios M.en
dc.contributor.authorSazeides, Yiannakisen
dc.creatorKleanthous, Mariosen
dc.creatorSazeides, Yiannakisen
dc.description.abstractCache-content-duplication (CCD) occurs when there is a miss for a block in a cache and the entire content of the missed block is already in the cache in a block with a different tag. Caches aware of content-duplication can have lower miss penalty by fetching, on a miss to a duplicate block, directly from the cache instead of accessing lower in the memory hierarchy, and can have lower miss rates by allowing only blocks with unique content to enter a cache. This work examines the potential of CCD for instruction caches. We show that CCD is a frequent phenomenon and that an idealized duplication-detection mechanism for instruction caches has the potential to increase performance of an out-of-order processor, with a 16KB, 8-way, 8 instructions per block instruction cache, often by more than 10% and up to 36%. This work also proposes CATCH, a hardware mechanism for dynamically detecting CCD for instruction caches. Experimental results for an out-of-order processor show that a duplication-detection mechanism with a 1.38KB cost captureson average 58% of the CCD's idealized potential. © 2011 ACM.en
dc.sourceTransactions on Architecture and Code Optimizationen
dc.subjectCache memoryen
dc.subjectMicroprocessor chipsen
dc.subjectHardware mechanismen
dc.subjectInstruction cachesen
dc.subjectCache compressionen
dc.subjectCache content duplication.en
dc.subjectCache optimizationsen
dc.subjectMemory hierarchyen
dc.subjectOut-of-order processorsen
dc.titleCATCH: A mechanism for dynamically detecting cache-content-duplication in instruction cachesen
dc.description.issue3 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied SciencesΤμήμα Πληροφορικής / Department of Computer Science
dc.description.notes<p>Cited By :1</p>en
dc.source.abbreviationTrans.Archit.Code Optim.en

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