The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices
Date
2013Author
Solinas, M.Badia, R. M.
Bodin, F.
Cohen, A.
Evripidou, Paraskevas
Faraboschi, P.
Fechner, B.
Gao, G. R.
Garbade, A.
Girbal, S.
Goodman, D.
Khan, B.
Koliai, S.
Li, F.
Luján, M.
Morin, L.
Mendelson, A.
Navarro, N.
Pop, A.
Trancoso, Pedro
Ungerer, T.
Valero, M.
Weis, S.
Watson, I.
Zuckermann, S.
Giorgi, Roberto
ISBN
978-0-7695-5074-9Source
Proceedings - 16th Euromicro Conference on Digital System Design, DSD 201316th Euromicro Conference on Digital System Design, DSD 2013
Pages
272-279Google Scholar check
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Show full item recordAbstract
Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the dataflow principles. This paper describes the project and provides an overview of the research carried out by the TERAFLUX consortium. © 2013 IEEE.