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dc.contributor.authorSkitsas, Michael A.en
dc.contributor.authorNicopoulos, Chrysostomos A.en
dc.contributor.authorMichael, Maria K.en
dc.creatorSkitsas, Michael A.en
dc.creatorNicopoulos, Chrysostomos A.en
dc.creatorMichael, Maria K.en
dc.date.accessioned2021-01-26T09:45:26Z
dc.date.available2021-01-26T09:45:26Z
dc.date.issued2018
dc.identifier.issn1573-0727
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/63221
dc.description.abstractAs technology scales, the increased vulnerability of modern systems due to unreliable components becomes a major problem in the era of multi-/many-core architectures. Recently, several on-line testing techniques have been proposed, aiming towards error detection of wear-out/aging-related defects that can appear during the lifetime of a system. In this work, firstly we investigate the relation between system test latency and test-time overhead in multi-/many-core systems with shared Last-Level Cache (LLC) for periodic Software-Based Self-Testing (SBST), under different test scheduling policies. Secondly, we propose a new methodology aiming to reduce the extra overhead related to testing that is incurred as the system scales up (i.e., the number of on-chip cores increases). The investigated scheduling policies primarily vary the number of cores concurrently under test in the overall system test session. Our extensive, workload-driven dynamic exploration reveals that there is an inverse relationship between the two test measuresen
dc.description.abstractas the number of cores concurrently under test increases, system test latency decreases, but at the cost of significantly increased test time, which sacrifices system availability for the actual workloads. Under given system test latency constraints, which dictate the recovery time in the event of error detection, our exploration framework identifies the scheduling policy under which the overall test-time overhead is minimized and, hence, system availability is maximized. For the evaluation of the proposed techniques, multi-/many-core systems consisting of 16 and 64 cores are explored in a full-system, execution-driven simulation framework running multi-threaded PARSEC workloads.en
dc.language.isoenen
dc.sourceJournal of Electronic Testingen
dc.source.urihttps://doi.org/10.1007/s10836-018-5706-0
dc.titleExploring System Availability During Software-Based Self-Testing of Multi-core CPUsen
dc.typeinfo:eu-repo/semantics/article
dc.identifier.doi10.1007/s10836-018-5706-0
dc.description.volume34
dc.description.issue1
dc.description.startingpage67
dc.description.endingpage81
dc.author.facultyΠολυτεχνική Σχολή / Faculty of Engineering
dc.author.departmentΤμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtypeArticleen
dc.source.abbreviationJ Electron Testen
dc.contributor.orcidNicopoulos, Chrysostomos A. [0000-0001-6389-6068]
dc.contributor.orcidSkitsas, Michael A. [0000-0003-4715-3162]
dc.gnosis.orcid0000-0001-6389-6068
dc.gnosis.orcid0000-0003-4715-3162


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