Performance and power optimization through data compression in Network-on-Chip architectures
Ημερομηνία
2008Συγγραφέας
Das, R.Mishra, A. K.

Park, D.
Narayanan, V.
Iyer, R.
Yousif, M. S.
Das, C. R.
Source
2008 IEEE 14th International Symposium on High Performance Computer ArchitecturePages
215-225Google Scholar check
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