Function-based compact test pattern generation for path delay faults

dc.contributor.author	Michael, Maria K.	en
dc.contributor.author	Tragoudas, S.	en
dc.creator	Michael, Maria K.	en
dc.creator	Tragoudas, S.	en
dc.date.accessioned	2019-04-08T07:47:11Z
dc.date.available	2019-04-08T07:47:11Z
dc.date.issued	2005
dc.identifier.uri	http://gnosis.library.ucy.ac.cy/handle/7/44220
dc.source	IEEE Transactions on Very Large Scale Integration (VLSI) Systems	en
dc.source.uri	https://www.scopus.com/inward/record.uri?eid=2-s2.0-27144527970&doi=10.1109%2fTVLSI.2005.853607&partnerID=40&md5=4566e32702cae8894da36f1709c68264
dc.title	Function-based compact test pattern generation for path delay faults	en
dc.type	info:eu-repo/semantics/article
dc.identifier.doi	10.1109/TVLSI.2005.853607
dc.description.volume	13
dc.description.issue	8
dc.description.startingpage	996
dc.description.endingpage	1001
dc.author.faculty	Πολυτεχνική Σχολή / Faculty of Engineering
dc.author.department	Τμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών / Department of Electrical and Computer Engineering
dc.type.uhtype	Article	en
dc.source.abbreviation	IEEE Trans Very Large Scale Integr VLSI Syst	en
dc.contributor.orcid	Michael, Maria K. [0000-0002-1943-6547]
dc.gnosis.orcid	0000-0002-1943-6547

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