dc.contributor.author | Busch, Costas | en |
dc.contributor.author | Magdon-Ismail, M. | en |
dc.contributor.author | Mavronicolas, Marios | en |
dc.creator | Busch, Costas | en |
dc.creator | Magdon-Ismail, M. | en |
dc.creator | Mavronicolas, Marios | en |
dc.date.accessioned | 2019-11-13T10:38:50Z | |
dc.date.available | 2019-11-13T10:38:50Z | |
dc.date.issued | 2007 | |
dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/53658 | |
dc.description.abstract | A packet-switching algorithm specifies the actions of the nodes in order to deliver packets in the network. A packet-switching algorithm is universal if it applies to any network topology and for any batch communication problem on the network. A long-standing open problem has concerned the existence of a universal packet-switching algorithm with near-optimal performance guarantees for the class of bufferless networks where the buffer size for packets in transit is zero. We give a positive answer to this question. In particular, we give a universal bufferless algorithm which is within a polylogarithmic factor from optimal for arbitrary batch problems: T = O (Τ* · log 3(n + N)), where T is the packet delivery time of our algorithm, Τ* is the optimal delivery time, n is the size of the network, and N is the number of packets. At the heart of our result is a new deterministic technique for constructing a universal bufferless algorithm by emulating a store-and-forward algorithm on a transformation of the network. The main idea is to replace packet buffering in the transformed network with packet circulation in regions of the original network. The cost of the emulation on the packet delivery time is proportional to the buffer sizes used by the storeand-forward algorithm. We obtain the advertised result by using a store-and-forward algorithm with logarithmic sized buffers. The resulting bufferless algorithm is constructive and can be implemented in a distributed way. © 2007 Society for Industrial and Applied Mathematics. | en |
dc.source | SIAM Journal on Computing | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-49449085280&doi=10.1137%2f050642095&partnerID=40&md5=09eacb8d7f7d572bd534b42ea349954b | |
dc.subject | Communication | en |
dc.subject | Switching | en |
dc.subject | Routing | en |
dc.subject | Electric network topology | en |
dc.subject | Network topologies | en |
dc.subject | Packet switching | en |
dc.subject | Batch problems | en |
dc.subject | Buffer sizes | en |
dc.subject | Deterministic bufferless emulation | en |
dc.subject | Graph decomposition | en |
dc.subject | Open problems | en |
dc.subject | Optimal performances | en |
dc.subject | Optimal scheduling | en |
dc.subject | Poly-logarithmic factors | en |
dc.subject | Switching algorithms | en |
dc.title | Universal bufferless packet switching | en |
dc.type | info:eu-repo/semantics/article | |
dc.identifier.doi | 10.1137/050642095 | |
dc.description.volume | 37 | |
dc.description.issue | 4 | |
dc.description.startingpage | 1139 | |
dc.description.endingpage | 1162 | |
dc.author.faculty | 002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences | |
dc.author.department | Τμήμα Πληροφορικής / Department of Computer Science | |
dc.type.uhtype | Article | en |
dc.description.notes | <p>Cited By :2</p> | en |
dc.source.abbreviation | SIAM J Comput | en |
dc.contributor.orcid | Busch, Costas [0000-0002-4381-4333] | |
dc.gnosis.orcid | 0000-0002-4381-4333 | |