Show simple item record

dc.contributor.authorChen, Hongxuen
dc.contributor.authorLambert, Jimen
dc.contributor.authorPitsillides, Andreasen
dc.creatorChen, Hongxuen
dc.creatorLambert, Jimen
dc.creatorPitsillides, Andreasen
dc.date.accessioned2019-11-13T10:38:53Z
dc.date.available2019-11-13T10:38:53Z
dc.date.issued1995
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/53692
dc.description.abstractMultistage networks are strong candidates for implementation of ATM switching fabrics in B-ISDN networks. Among a number of proposed multistage networks, the Banyan network with its self-routing property, modular structure and suitability for VLSI implementation has received much attention. But the Banyan network suffers from internal link blocking and output port blocking. The Batcher sorting network was proposed to prevent internal link blocking, but it cannot prevent output port blocking. In this paper, we present a new 'Relay Chain' (RC) contention control network to prevent output port blocking. A parallel input buffer is adopted, with a special relay chain controller to solve the head of line (HOL) blocking problem normally associated with the input buffer strategy. The relay chain bus structure has a simple topology and makes the contention control network easy to implement. Performance analysis shows that this switch architecture achieves low cell loss rate together with the high throughput normally associated with output buffering.en
dc.sourceConference Record / IEEE Global Telecommunications Conferenceen
dc.sourceProceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3)en
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-0029533853&partnerID=40&md5=3e30751d2cabc12fc8d70c73d481cb96
dc.subjectPerformanceen
dc.subjectBuffer storageen
dc.subjectBroadband networksen
dc.subjectParallel processing systemsen
dc.subjectTelecommunication controlen
dc.subjectSwitching networksen
dc.subjectElectric network topologyen
dc.subjectVLSI circuitsen
dc.subjectTelecommunication trafficen
dc.subjectAsynchronous transfer modeen
dc.subjectBanyan networksen
dc.subjectBatcher sorting networksen
dc.subjectCell loss rateen
dc.subjectInternal link blockingen
dc.subjectOutput bufferingen
dc.subjectOutput port blockingen
dc.subjectRelay chain contention control networksen
dc.subjectVoice/data communication systemsen
dc.titleRC-BB switch a high performance switching network for B-ISDNen
dc.typeinfo:eu-repo/semantics/conferenceObject
dc.description.volume3
dc.description.startingpage2097
dc.description.endingpage2101
dc.author.faculty002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences
dc.author.departmentΤμήμα Πληροφορικής / Department of Computer Science
dc.type.uhtypeConference Objecten
dc.description.notes<p>Sponsors: IEEEen
dc.description.notesGLOBECOMen
dc.description.notesTASen
dc.description.notesNUSen
dc.description.notesNTUen
dc.description.noteset alen
dc.description.notesConference code: 44561en
dc.description.notesCited By :2</p>en
dc.contributor.orcidPitsillides, Andreas [0000-0001-5072-2851]
dc.gnosis.orcid0000-0001-5072-2851


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record