dc.contributor.author | Chen, Hongxu | en |
dc.contributor.author | Lambert, Jim | en |
dc.contributor.author | Pitsillides, Andreas | en |
dc.creator | Chen, Hongxu | en |
dc.creator | Lambert, Jim | en |
dc.creator | Pitsillides, Andreas | en |
dc.date.accessioned | 2019-11-13T10:38:53Z | |
dc.date.available | 2019-11-13T10:38:53Z | |
dc.date.issued | 1995 | |
dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/53692 | |
dc.description.abstract | Multistage networks are strong candidates for implementation of ATM switching fabrics in B-ISDN networks. Among a number of proposed multistage networks, the Banyan network with its self-routing property, modular structure and suitability for VLSI implementation has received much attention. But the Banyan network suffers from internal link blocking and output port blocking. The Batcher sorting network was proposed to prevent internal link blocking, but it cannot prevent output port blocking. In this paper, we present a new 'Relay Chain' (RC) contention control network to prevent output port blocking. A parallel input buffer is adopted, with a special relay chain controller to solve the head of line (HOL) blocking problem normally associated with the input buffer strategy. The relay chain bus structure has a simple topology and makes the contention control network easy to implement. Performance analysis shows that this switch architecture achieves low cell loss rate together with the high throughput normally associated with output buffering. | en |
dc.source | Conference Record / IEEE Global Telecommunications Conference | en |
dc.source | Proceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3) | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-0029533853&partnerID=40&md5=3e30751d2cabc12fc8d70c73d481cb96 | |
dc.subject | Performance | en |
dc.subject | Buffer storage | en |
dc.subject | Broadband networks | en |
dc.subject | Parallel processing systems | en |
dc.subject | Telecommunication control | en |
dc.subject | Switching networks | en |
dc.subject | Electric network topology | en |
dc.subject | VLSI circuits | en |
dc.subject | Telecommunication traffic | en |
dc.subject | Asynchronous transfer mode | en |
dc.subject | Banyan networks | en |
dc.subject | Batcher sorting networks | en |
dc.subject | Cell loss rate | en |
dc.subject | Internal link blocking | en |
dc.subject | Output buffering | en |
dc.subject | Output port blocking | en |
dc.subject | Relay chain contention control networks | en |
dc.subject | Voice/data communication systems | en |
dc.title | RC-BB switch a high performance switching network for B-ISDN | en |
dc.type | info:eu-repo/semantics/conferenceObject | |
dc.description.volume | 3 | |
dc.description.startingpage | 2097 | |
dc.description.endingpage | 2101 | |
dc.author.faculty | 002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences | |
dc.author.department | Τμήμα Πληροφορικής / Department of Computer Science | |
dc.type.uhtype | Conference Object | en |
dc.description.notes | <p>Sponsors: IEEE | en |
dc.description.notes | GLOBECOM | en |
dc.description.notes | TAS | en |
dc.description.notes | NUS | en |
dc.description.notes | NTU | en |
dc.description.notes | et al | en |
dc.description.notes | Conference code: 44561 | en |
dc.description.notes | Cited By :2</p> | en |
dc.contributor.orcid | Pitsillides, Andreas [0000-0001-5072-2851] | |
dc.gnosis.orcid | 0000-0001-5072-2851 | |