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dc.contributor.authorGupta, R.en
dc.contributor.authorEvripidou, Paraskevasen
dc.creatorGupta, R.en
dc.creatorEvripidou, Paraskevasen
dc.description.abstractMedian filtering, an image enhancement technique, is commonly used to filter out certain types of noise from an image. In this technique each pixel value in the image is replaced by the median value of the pixels in a window centered around the pixel. This paper discusses the design and implementation of median filters using pipelined multistage networks. The first part of the multistage network is a bitonic sequencer, followed by a shuffle stage feeding the bitonic sorter. The bitonic sorter shuffles the data at every stage, which is implemented as an Omega network. Earlier designs for such filters have used a number of basic unit cells interconnected in a sorting network. In the best known VLSI implementation currently in use, the delay and the number of basic unit cells, increase as O(n) and O(n2), respectively, for an (n = s × s) window of pixels. The improvements in the basic unit cell and the network layout topology presented here reduce the number of cells used to O(n log2n) and the delay to O(log2n). © 1993 Academic Press, Inc.en
dc.sourceDigital Signal Processingen
dc.titleDesign and implementation of an efficient general-purpose median filter networken
dc.description.endingpage72 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied SciencesΤμήμα Πληροφορικής / Department of Computer Science
dc.description.notes<p>Cited By :7</p>en
dc.source.abbreviationDigital Signal Process Rev.J.en
dc.contributor.orcidEvripidou, Paraskevas [0000-0002-2335-9505]

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