dc.contributor.author | Rosner, R. | en |
dc.contributor.author | Moffie, M. | en |
dc.contributor.author | Sazeides, Yiannakis | en |
dc.contributor.author | Ronen, R. | en |
dc.creator | Rosner, R. | en |
dc.creator | Moffie, M. | en |
dc.creator | Sazeides, Yiannakis | en |
dc.creator | Ronen, R. | en |
dc.date.accessioned | 2019-11-13T10:42:07Z | |
dc.date.available | 2019-11-13T10:42:07Z | |
dc.date.issued | 2003 | |
dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/54901 | |
dc.description.abstract | This paper performs a comprehensive investigation of dynamic selection for long atomic traces. It introduces a classification of trace selection methods and discusses existing and novel dynamic selection approaches - including loop unrolling, procedure in-lining and incremental merging of traces based on dynamic bias. The paper empirically analyzes a number of selection schemes in an idealized framework. Observations based on the SPEC-CPU2000 benchmarks show that: (a) selection based on dynamic bias is necessary to achieve the best performance across all benchmarks, (b) the best selection scheme is benchmark and maximum trace-length specific, (c) simple selection, based on program structure information only, is sufficient to achieve the best performance for several benchmarks. Consequently, two alternatives for the trace selection mechanism are established: (a) a "best performance" approach relying on complex dynamic criteria | en |
dc.description.abstract | (b) a "value" approach that provides the best performance (and potentially the best power consumption) based on simpler static criteria. Another emerging alternative advocates adaptive based mechanisms to adjust selection criteria. | en |
dc.source | Proceedings of the International Conference on Supercomputing | en |
dc.source | 2003 International Conference on Supercomputing | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-1142305201&partnerID=40&md5=54971635d94465b08b5fd0007e668710 | |
dc.subject | Computer programming | en |
dc.subject | Algorithms | en |
dc.subject | Computer architecture | en |
dc.subject | Cache memory | en |
dc.subject | Integer programming | en |
dc.subject | Digital arithmetic | en |
dc.subject | Adaptive systems | en |
dc.subject | Program processors | en |
dc.subject | Energy utilization | en |
dc.subject | Trace atomicity | en |
dc.subject | Trace cache | en |
dc.subject | Trace processors | en |
dc.subject | Trace selection | en |
dc.title | Selecting Long Atomic Traces for High Coverage | en |
dc.type | info:eu-repo/semantics/conferenceObject | |
dc.description.startingpage | 2 | |
dc.description.endingpage | 11 | |
dc.author.faculty | 002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences | |
dc.author.department | Τμήμα Πληροφορικής / Department of Computer Science | |
dc.type.uhtype | Conference Object | en |
dc.description.notes | <p>Sponsors: ACM/SIGARCH | en |
dc.description.notes | Intel Corporation | en |
dc.description.notes | Florida State University | en |
dc.description.notes | Conference code: 62275 | en |
dc.description.notes | Cited By :6</p> | en |