dc.contributor.author | Sazeides, Yiannakis | en |
dc.contributor.author | Constantinou, T. | en |
dc.contributor.author | Kumar, R. | en |
dc.contributor.author | Tullsen, D. M. | en |
dc.creator | Sazeides, Yiannakis | en |
dc.creator | Constantinou, T. | en |
dc.creator | Kumar, R. | en |
dc.creator | Tullsen, D. M. | en |
dc.date.accessioned | 2019-11-13T10:42:10Z | |
dc.date.available | 2019-11-13T10:42:10Z | |
dc.date.issued | 2005 | |
dc.identifier.issn | 1556-6056 | |
dc.identifier.uri | http://gnosis.library.ucy.ac.cy/handle/7/54931 | |
dc.description.abstract | This paper shows that if the execution of a program is divided into distinct intervals, it is possible for one processor or configuration to provide the best power efficiency over every interval, and yet have worse overall power efficiency over the entire execution than other configurations. This unintuitive behavior is a result of a seemingly intuitive use of power efficiency metrics, and can result in suboptimal design and execution decisions. This behavior may occur when using the energy-delay product and energy-delay2 product metrics but not with the energy metric. © 2005, IEEE. All rights reserved. | en |
dc.source | IEEE Computer Architecture Letters | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85008056730&doi=10.1109%2fL-CA.2005.2&partnerID=40&md5=1602e61aa9ae421c8f1aec6e839d5689 | |
dc.title | The Danger of Interval-Based Power Efficiency Metrics: When Worst Is Best | en |
dc.type | info:eu-repo/semantics/article | |
dc.identifier.doi | 10.1109/L-CA.2005.2 | |
dc.description.volume | 4 | |
dc.description.issue | 1 | |
dc.description.startingpage | 1 | |
dc.description.endingpage | 4 | |
dc.author.faculty | 002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences | |
dc.author.department | Τμήμα Πληροφορικής / Department of Computer Science | |
dc.type.uhtype | Article | en |
dc.description.notes | <p>Cited By :12</p> | en |
dc.source.abbreviation | IEEE Comput.Archit.Lett. | en |