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dc.contributor.authorSazeides, Yiannakisen
dc.contributor.authorConstantinou, T.en
dc.contributor.authorKumar, R.en
dc.contributor.authorTullsen, D. M.en
dc.creatorSazeides, Yiannakisen
dc.creatorConstantinou, T.en
dc.creatorKumar, R.en
dc.creatorTullsen, D. M.en
dc.date.accessioned2019-11-13T10:42:10Z
dc.date.available2019-11-13T10:42:10Z
dc.date.issued2005
dc.identifier.issn1556-6056
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/54931
dc.description.abstractThis paper shows that if the execution of a program is divided into distinct intervals, it is possible for one processor or configuration to provide the best power efficiency over every interval, and yet have worse overall power efficiency over the entire execution than other configurations. This unintuitive behavior is a result of a seemingly intuitive use of power efficiency metrics, and can result in suboptimal design and execution decisions. This behavior may occur when using the energy-delay product and energy-delay2 product metrics but not with the energy metric. © 2005, IEEE. All rights reserved.en
dc.sourceIEEE Computer Architecture Lettersen
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85008056730&doi=10.1109%2fL-CA.2005.2&partnerID=40&md5=1602e61aa9ae421c8f1aec6e839d5689
dc.titleThe Danger of Interval-Based Power Efficiency Metrics: When Worst Is Besten
dc.typeinfo:eu-repo/semantics/article
dc.identifier.doi10.1109/L-CA.2005.2
dc.description.volume4
dc.description.issue1
dc.description.startingpage1
dc.description.endingpage4
dc.author.faculty002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences
dc.author.departmentΤμήμα Πληροφορικής / Department of Computer Science
dc.type.uhtypeArticleen
dc.description.notes<p>Cited By :12</p>en
dc.source.abbreviationIEEE Comput.Archit.Lett.en


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