Adaptive high-end microprocessor for power-performance efficiency

Abstract

Microprocessor development costs are considerably high. To minimize these costs, manufacturers produce a single design that better satisfies, in average, a wide range of applications. Nevertheless, as applications have different characteristics and users have different demands, this single design is suboptimal in many situations. As a consequence there is a need to design microprocessors that are "flexible" and adapt to the different scenarios. This paper presents a simple multiple parameter selection algorithm to achieve high power-performance efficiency gains for each application. The proposed algorithm is tested using detailed simulation and a set of different applications from multimedia, scientific and database workloads. The experimental results show that when the selection algorithm is applied to a baseline configuration optimized for the corresponding workload, the efficiency gains are up to 30%. When the baseline used is optimized for a different workload then the gains may go up by an order of magnitude. The effectiveness of the simple selection algorithm with the proposed optimizations is impressive as the efficiency gains obtained represent 96% of the gains obtained with an ideal parameter selection algorithm. © 2006 IEEE.