Don’t Correct the Tags in a Cache, Just Check Their Hamming Distance from the Lookup Tag
Date
2018Author
Gendler, AlexBramnik, Arkady
Szapiro, Ariel
Sazeides, Yiannakis
Source
2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)Pages
571-582Google Scholar check
Metadata
Show full item recordAbstract
This paper describes the design of an efficient technique for correcting errors in the tag array of set-associative caches. The main idea behind this scheme is that for a cache tag array protected with ECC code, the stored tags do not need to be corrected prior to the comparison against a lookup tag for cache hit/miss definition. This eliminates the need for costly hardware to correct the cache tags before checking for a hit or a miss. The paper reveals the various optimizations needed to translate this idea into a design that delivers a practical improvement in a product. An analysis of our design, as compared to state of the art methods, shows that it can provide the same correction and detection strength with less area, power and timing overheads and better performance. An Intel Core® microprocessor is implementing this technique in its second level and third level caches.