The HARPA Approach to Ensure Dependable Performance
Date
2019Author
Zompakis, NikolaosNoltsis, Michail
Nikolaou, Panagiota
Englezakis, Panayiotis
Hadjilambrou, Zacharias
Ndreu, Lorena
Massari, Giuseppe
Libutti, Simone
Portero, Antoni
Sassi, Federico
Bacchini, Alessandro
Nicopoulos, Chrysostomos
Sazeides, Yiannakis
Vavrik, Radim
Golasowski, Martin
Sevcik, Jiri
Kuchar, Stepan
Vondrak, Vit
Agnes, Fritsch
Cappelle, Hans
Catthoor, Francky
Fornaciari, William
Soudris, Dimitrios
ISBN
978-3-319-91962-1Publisher
Springer International PublishingPlace of publication
ChamSource
Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms: A Cross-layer ApproachPages
1-19Google Scholar check
Metadata
Show full item recordAbstract
The goal of the HARPA solution is to overcome the performance variability (PV) by enabling next-generation embedded and high-performance platforms using heterogeneous many-core processors to provide cost-effectively dependable performance: the correct functionality and (where needed) timing guarantees throughout the expected lifetime of a platform. This must be accomplished in the presence of cycle-by-cycle performance variability due to time-dependent variations in silicon devices and wires under thermal, power, and energy constraints. The common challenge for both embedded and high-performance systems is to harness the unsustainable increases in design and operational margins and yet provide dependable performance. For example, resources that are statically determined based on worst-case execution time for real-time applications or lower clock frequency to satisfy excessive timing margins in high-performance processors.