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Total Visits
| Views | |
|---|---|
| A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension | 106 |
Total Visits Per Month
| March 2024 | April 2024 | May 2024 | June 2024 | July 2024 | August 2024 | September 2024 | |
|---|---|---|---|---|---|---|---|
| A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension | 1 | 3 | 6 | 2 | 1 | 9 | 5 |
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