• Conference Object  

      RVC-based time-predictable faulty caches for safety-critical systems 

      Abella, J.; Quiñones, E.; Cazorla, F. J.; Valero, M.; Sazeides, Yiannakis (2011)
      Technology and Vcc scaling lead to significant faulty bit rates in caches. Mechanisms based on disabling faulty parts show to be effective for average performance but are unacceptable in safety critical systems where ...
    • Conference Object  

      RVC: A mechanism for time-analyzable real-time processors with faulty caches 

      Abella, J.; Quiñones, E.; Cazorla, F. J.; Sazeides, Yiannakis; Valero, M. (2011)
      Geometry scaling due to technology evolution as well as Vcc scaling lead to failures in large SRAM arrays such as caches. Faulty bits can be tolerated from the average performance perspective, but make critical realtime ...
    • Conference Object  

      The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices 

      Solinas, M.; Badia, R. M.; Bodin, F.; Cohen, A.; Evripidou, Paraskevas; Faraboschi, P.; Fechner, B.; Gao, G. R.; Garbade, A.; Girbal, S.; Goodman, D.; Khan, B.; Koliai, S.; Li, F.; Luján, M.; Morin, L.; Mendelson, A.; Navarro, N.; Pop, A.; Trancoso, Pedro; Ungerer, T.; Valero, M.; Weis, S.; Watson, I.; Zuckermann, S.; Giorgi, Roberto (2013)
      Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably ...
    • Article  

      TERAFLUX: Harnessing dataflow in next generation teradevices 

      Giorgi, Roberto; Badia, R. M.; Bodin, F.; Cohen, A.; Evripidou, Paraskevas; Faraboschi, P.; Fechner, B.; Gao, G. R.; Garbade, A.; Gayatri, R.; Girbal, S.; Goodman, D.; Khan, B.; Koliaï, S.; Landwehr, J.; Lê, N. M.; Li, F.; Lujàn, M.; Mendelson, A.; Morin, L.; Navarro, N.; Patejko, T.; Pop, A.; Trancoso, Pedro; Ungerer, T.; Watson, I.; Weis, S.; Zuckerman, S.; Valero, M. (2014)
      The improvements in semiconductor technologies are gradually enabling extreme-scale systems such as teradevices (i.e., chips composed by 1000 billion of transistors), most likely by 2020. Three major challenges have been ...