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dc.contributor.authorPratas, F.en
dc.contributor.authorTomas, P.en
dc.contributor.authorTrancoso, Pedroen
dc.contributor.authorSousa, L.en
dc.creatorPratas, F.en
dc.creatorTomas, P.en
dc.creatorTrancoso, Pedroen
dc.creatorSousa, L.en
dc.description.abstractReconfigurable hardware can be used as an energy and performance efficient co-processing solution to accelerate certain types of applications. To facilitate the design of hardware accelerators we have proposed a methodology that adopts the stream-based computing model and the usage of Graphics Processing Units as prototyping platforms. In this paper we go a step further and propose a new modular architecture for low-power reconfigurable systems to easily map the stream-based algorithms. In particular, the architecture consists of a semi-programable accelerator set that can be adapted to the application needs in terms of functional units and number of streaming engines. The proposed embedded architecture mates the flexibility of reconfigurable hardware with the advantages of stream computing for the strict needs of embedded reconfigurable devices. We show a possible organization for this architecture. Moreover, we provide a general case study to analyze the scalability of the proposed architecture in an Altera FPGA. Our experimental results show that a significant speed-up can be achieved compared to general purpose processors using low-power FPGA devices. Our preliminary estimates show that it is also possible to achieve energy savings of up to 118x. © 2012 IEEE.en
dc.sourceProceedings - 2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2012en
dc.source2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2012en
dc.subjectComputer simulationen
dc.subjectProposed architecturesen
dc.subjectEnergy efficienten
dc.subjectEmbedded systemsen
dc.subjectStructural designen
dc.subjectComputer graphicsen
dc.subjectField programmable gate arrays (FPGA)en
dc.subjectProgram processorsen
dc.subjectReconfigurable hardwareen
dc.subjectModular architecturesen
dc.subjectEnergy efficiencyen
dc.subjectComputer hardware description languagesen
dc.subjectLow Poweren
dc.subjectFunctional unitsen
dc.subjectGeneral purpose processorsen
dc.subjectAltera fpgaen
dc.subjectComputing modelen
dc.subjectConfigurable architecturesen
dc.subjectDesign of hardwaresen
dc.subjectEmbedded architectureen
dc.subjectEmbedded platformsen
dc.subjectGraphics Processing Uniten
dc.subjectLow-power FPGAsen
dc.subjectPrototyping platformen
dc.subjectReconfigurable devicesen
dc.subjectReconfigurable systemsen
dc.subjectStream computingen
dc.subjectStreaming enginesen
dc.titleEnergy efficient stream-based configurable architecture for embedded platformsen
dc.description.endingpage200 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied SciencesΤμήμα Πληροφορικής / Department of Computer Science
dc.type.uhtypeConference Objecten
dc.description.notes<p>Conference code: 95456en
dc.description.notesCited By :1</p>en
dc.contributor.orcidTrancoso, Pedro [0000-0002-2776-9253]

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