Thermal-aware scheduling: A solution for future chip multiprocessors thermal problems
SourceProceedings of the 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006
9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006
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The increased complexity and operating frequency in current microprocessors is resulting in a decrease in the performance improvements. In order to keep up with the expected performance gains, major manufacturers have started to offer chip-multiprocessor architectures. Nevertheless, the integration of several cores on the same chip leads to increased heat dissipation and consequently additional costs, decrease of the reliability, and performance loss, among others. In this paper we propose Thermal-Aware Scheduling (TAS) a technique that aims to minimize all these problems. When assigning processes to cores, TAS takes their temperature into account avoiding thermal violation events. As a side effect, the performance is improved. Simulation results show that for a 25-core CMP, a simple TAS heuristic reduces the performance loss that is introduced by excessive temperature, from 52% to 18%. At the same time, TAS decreases the chip's temperature by 2.6°C. © 2006 IEEE.