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dc.contributor.authorStavrou, Kyriakosen
dc.contributor.authorTrancoso, Pedroen
dc.creatorStavrou, Kyriakosen
dc.creatorTrancoso, Pedroen
dc.date.accessioned2019-11-13T10:42:25Z
dc.date.available2019-11-13T10:42:25Z
dc.date.issued2006
dc.identifier.isbn0-7695-2609-8
dc.identifier.isbn978-0-7695-2609-6
dc.identifier.urihttp://gnosis.library.ucy.ac.cy/handle/7/55035
dc.description.abstractThe increased complexity and operating frequency in current microprocessors is resulting in a decrease in the performance improvements. In order to keep up with the expected performance gains, major manufacturers have started to offer chip-multiprocessor architectures. Nevertheless, the integration of several cores on the same chip leads to increased heat dissipation and consequently additional costs, decrease of the reliability, and performance loss, among others. In this paper we propose Thermal-Aware Scheduling (TAS) a technique that aims to minimize all these problems. When assigning processes to cores, TAS takes their temperature into account avoiding thermal violation events. As a side effect, the performance is improved. Simulation results show that for a 25-core CMP, a simple TAS heuristic reduces the performance loss that is introduced by excessive temperature, from 52% to 18%. At the same time, TAS decreases the chip's temperature by 2.6°C. © 2006 IEEE.en
dc.sourceProceedings of the 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006en
dc.source9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006en
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-34250854042&doi=10.1109%2fDSD.2006.88&partnerID=40&md5=54dbfa6460fbef7fd0a648a5aed5d91f
dc.subjectProblem solvingen
dc.subjectComputer simulationen
dc.subjectMultiprocessing systemsen
dc.subjectSchedulingen
dc.subjectThermal effectsen
dc.subjectHeat lossesen
dc.subjectOperating frequencyen
dc.subjectThermal Aware Scheduling (TAS)en
dc.titleThermal-aware scheduling: A solution for future chip multiprocessors thermal problemsen
dc.typeinfo:eu-repo/semantics/conferenceObject
dc.identifier.doi10.1109/DSD.2006.88
dc.description.startingpage123
dc.description.endingpage126
dc.author.faculty002 Σχολή Θετικών και Εφαρμοσμένων Επιστημών / Faculty of Pure and Applied Sciences
dc.author.departmentΤμήμα Πληροφορικής / Department of Computer Science
dc.type.uhtypeConference Objecten
dc.description.notes<p>Conference code: 69809en
dc.description.notesCited By :16</p>en
dc.contributor.orcidTrancoso, Pedro [0000-0002-2776-9253]
dc.gnosis.orcid0000-0002-2776-9253


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